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FSDM07652R
Features
Green Mode Fairchild Power Switch (FPS)
* Internal Avalanche Rugged Sense FET * Advanced Burst-Mode operation consumes under 1 W at 240VAC & 0.5W load * Precision Fixed Operating Frequency (66kHz) * Internal Start-up Circuit * Pulse by Pulse Current Limiting * Abnormal Over Current Protection (AOCP) * Over Voltage Protection (OVP) * Over Load Protection (OLP) * Internal Thermal Shutdown Function (TSD) * Auto-Restart Mode * Under Voltage Lock Out (UVLO) with hysteresis * Low Operating Current (2.5mA) * Built-in Soft Start OUTPUT POWER TABLE
230VAC 15%(3) PRODUCT FSDM0565R FSDM07652R Adapter(1) 60W 70W Open Frame(2) 70W 80W 85-265VAC Adapter(1) 50W 60W Open Frame(2) 60W 70W
Table 1. Notes: 1. Typical continuous power in a non-ventilated enclosed adapter measured at 50C ambient. 2. Maximum practical continuous power in an open frame design at 50C ambient. 3. 230 VAC or 100/115 VAC with doubler.
Application
* SMPS for LCD monitor and STB * Adaptor
Typical Circuit
Description
The FSDM07652R is an integrated Pulse Width Modulator (PWM) and Sense FET specifically designed for high performance offline Switch Mode Power Supplies (SMPS) with minimal external components. This device is an integrated high voltage power switching regulator which combine an avalanche rugged Sense FET with a current mode PWM control block. The PWM controller includes integrated fixed frequency oscillator, under voltage lockout, leading edge blanking (LEB), optimized gate driver, internal soft start, temperature compensated precise current sources for a loop compensation and self protection circuitry. Compared with discrete MOSFET and PWM controller solution, it can reduce total cost, component count, size and weight simultaneously increasing efficiency, productivity, and system reliability. This device is a basic platform well suited for cost effective designs of flyback converters.
AC IN
DC OUT
Vstr PWM Vfb
Drain
Vcc
Source
Figure 1. Typical Flyback Application
Rev.1.0.2
(c)2004 Fairchild Semiconductor Corporation
FSDM07652R
Internal Block Diagram
Vcc 3 N.C 5 0.5/0.7V
+
Vstr 6
Drain 1
Istart
Vref 8V/12V Switching disable
OSC IFB
S Q
Vcc Idelay Vref
Vcc good
Internal Bias
Vfb 4
PWM 2.5R
Soft start
R
Q
R LEB
Gate driver
VSD Vcc Vovp TSD Vcc good
S Q
2 GND
R
Q
AOCP
Vocp
Figure 2. Functional Block Diagram of FSDM07652R
2
FSDM07652R
Pin Definitions
Pin Number 1 2 3 Pin Name Drain GND Vcc Pin Function Description This pin is the high voltage power Sense FET drain. It is designed to drive the transformer directly. This pin is the control ground and the Sense FET source. This pin is the positive supply voltage input. During start up, the power is supplied by an internal high voltage current source that is connected to the Vstr pin. When Vcc reaches 12V, the internal high voltage current source is disabled and the power is supplied from the auxiliary transformer winding. This pin is internally connected to the inverting input of the PWM comparator. The collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor should be placed between this pin and GND. If the voltage of this pin reaches 6.0V, the over load protection is activated resulting in shutdown of the FPS. This pin is connected directly to the high voltage DC link. At startup, the internal high voltage current source supplies internal bias and charges the external capacitor that is connected to the Vcc pin. Once Vcc reaches 12V, the internal current source is disabled.
4
Vfb
5 6
N.C Vstr
Pin Configuration
TO-220F-6L
6.Vstr 5.N.C. 4.Vfb 3.Vcc 2.GND 1.Drain
Figure 3. Pin Configuration (Top View)
3
FSDM07652R
Absolute Maximum Ratings
(Ta=25C, unless otherwise specified) Parameter Vstr Max Voltage Pulsed Drain current (Tc=25C)
(1)
Symbol VSTR IDM ID EAS IAS VCC VFB PD(Watt H/S) Tj TA TSTG
Value 650 28 7 4.5 370 19 -0.3 to VCC 62 +150 -25 to +85 -55 to +150
Unit V ADC A A mJ A V V W C C C
Continuous Drain Current(Tc=25C) Continuous Drain Current(Tc=100C) Single pulsed avalanche energy (2) Single pulsed avalanche current (3) Supply voltage Input voltage range Total power dissipation(Tc=25C) Operating junction temperature Operating ambient temperature Storage temperature range
Notes: 1. Repetitive rating: Pulse width limited by maximum junction temperature 2. L=14mH, starting Tj=25C 3. L=13uH, starting Tj=25C
Thermal Impedance
Parameter Junction-to-Ambient Thermal Junction-to-Case Thermal Symbol Value 46.40 2.49 Unit C/W C/W
JA(1) JC(2)
Notes: 1. Free standing with no heat-sink under natural convection. 2. Infinite cooling condition - Refer to the SEMI G30-88.
4
FSDM07652R
Electrical Characteristics
(Ta = 25C unless otherwise specified) Parameter Sense FET SECTION Drain source breakdown voltage Zero gate voltage drain current Static drain source on resistance (1) Output capacitance Turn on delay time Rise time Turn off delay time Fall time CONTROL SECTION Initial frequency Voltage stability Temperature stability (2) Maximum duty cycle Minimum duty cycle Start threshold voltage Stop threshold voltage Feedback source current Soft-start time Leading Edge Blanking time BURST MODE SECTION Burst Mode Voltages (2) PROTECTION SECTION Peak current limit (4) Over voltage protection Abnormal Over current protection current (3) Thermal shutdown temperature (2) Shutdown feedback voltage IOVER VOVP IAOCP TSD VSD VFB 5.5V VFB=5V, VCC=14V 2.2 18 5.54 130 5.5 2.5 19 6.15 145 6.0 2.8 20 6.77 160 6.5 A V A C V 5 VBURH VBURL Vcc=14V Vcc=14V 0.7 0.5 V V FOSC FSTABLE FOSC DMAX DMIN VSTART VSTOP IFB TS TLEB VFB=GND VFB=GND VFB=GND VFB=3 VFB = 3V 13V Vcc 18V -25C Ta 85C 60 0 0 75 11 7 0.7 66 1 5 80 12 8 0.9 10 250 72 3 10 85 0 13 9 1.1 15 kHz % % % % V V mA ms ns BVDSS IDSS RDS(ON) COSS TD(ON) TR TD(OFF) TF VGS = 0V, ID = 250A VDS = 650V, VGS = 0V VDS= 520V VGS = 0V, TC = 125C VGS = 10V, ID = 2.5A VGS = 0V, VDS = 25V, f = 1MHz VDD= 325V, ID= 5A (MOSFET switching time is essentially independent of operating temperature) 650 1.4 100 22 60 115 65 50 200 1.6 ns V A A
Symbol
Condition
Min.
Typ.
Max.
Unit
pF
FSDM07652R
Shutdown delay current TOTAL DEVICE SECTION
IDELAY
VFB=5V
2.8
3.5
4.2
A
IOP Operating supply current (5) IOP(MIN) IOP(MAX)
VFB=GND, VCC=14V VFB=GND, VCC=10V VFB=GND, VCC=18V 2.5 5 mA
Notes: 1. Pulse test : Pulse width 300S, duty 2% 2. These parameters, although guaranteed at the design, are not tested in mass production. 3. These parameters, although guaranteed, are tested in EDS(wafer test) process. 4. These parameters indicate the inductor current. 5. This parameter is the current flowing into the control IC.
6
FSDM07652R
Comparison Between FS6M07652RTC and FSDM07652R
Function Soft-Start FS6M07652RTC Adjustable soft-start time using an external capacitor FSDM07652R FSDM07652R Advantages Internal soft-start with * Gradually increasing current limit typically 10ms (fixed) during soft-start further reduces peak current and voltage component stresses * Eliminates external components used for soft-start in most applications * Reduces or eliminates output overshoot
Burst Mode Operation
* Built into controller * Built into controller * Improve light load efficiency * Output voltage fixed * Reduces no-load consumption * Output voltage drops to around half
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FSDM07652R
Typical Performance Characteristics
(These Characteristic Graphs are Normalized at Ta= 25C)
1.2 1.0 0.8 0.6 0.4 0.2 0.0 -50 -25 0 25 50 75 100 125 Junction Temperature()
1.2 1.0 Start Thershold Voltage (Normalized to 25) 0.8 0.6 0.4 0.2 0.0 -50 -25 0 25 50 75 100 125 Junction Temperature()
Operating Current (Normalized to 25)
Operating Current vs. Temp
Start Threshold Voltage vs. Temp
1.2 1.0 Stop Threshold Voltage (Normalized to 25)
Initial Frequency (Normalized to 25)
1.2 1.0 0.8 0.6 0.4 0.2 0.0
0.8 0.6 0.4 0.2 0.0 -50 -25 0 25 50 75 100 125 Junction Temperature()
-50
-25
0
25
50
75
100
125
Junction Temperature()
Stop Threshold Voltage vs. Temp
Operating Freqency vs. Temp
1.2 1.0 Maximum Duty Cycle (Normalized to 25) FB Source Current (Normalized to 25) -50 -25 0 25 50 75 100 125 0.8 0.6 0.4 0.2 0.0 Junction Temperature()
1.2 1.0 0.8 0.6 0.4 0.2 0.0 -50 -25 0 25 50 75 100 125 Junction Temperature()
Maximum Duty vs. Temp
Feedback Source Current vs. Temp
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FSDM07652R
Typical Performance Characteristics (Continued)
(These Characteristic Graphs are Normalized at Ta= 25C)
1.2 1.0 Shutdown FB Voltage (Normalized to 25) 0.8 0.6 0.4 0.2 0.0 -50 -25 0 25 50 75 100 125 Junction Temperature()
1.2 1.0 Shutdown Delay Current (Normalized to 25) 0.8 0.6 0.4 0.2 0.0 -50 -25 0 25 50 75 100 125 Junction Temperature()
ShutDown Feedback Voltage vs. Temp
1.2 1.0 Over Voltage Protection (Normalized to 25) 0.8 0.6 0.4 0.2 0.0 -50 -25 0 25 50 75 100 125
ShutDown Delay Current vs. Temp
1.2 1.0 0.8 0.6 0.4 0.2 0.0 -50 -25 0 25 50 75 100 125 Junction Temperature()
Junction Temperature()
Over Voltage Protection vs. Temp
1.2 1.0
Burst Mode Enable Voltage (Normalized to 25)
Burst Mode Enable Voltage vs. Temp
1.2 1.0 Over Current Limit (Normalized to 25) 0.8 0.6 0.4 0.2 0.0
Burst Mode Disable Voltage (Normalized to 25)
0.8 0.6 0.4 0.2 0.0 -50 -25 0 25 50 75 100 125 Junction Temperature()
-50
-25
0
25
50
75
100
125
Junction Temperature()
Burst Mode Disable Voltage vs. Temp
Current Limit vs. Temp
9
FSDM07652R
Typical Performance Characteristics (Continued)
(These Characteristic Graphs are Normalized at Ta= 25C)
1.2 1.0 Soft Start Time (Normalized to 25) 0.8 0.6 0.4 0.2 0.0 -50 -25 0 25 50 75 100 125 Junction Temperature ()
Soft Start Time vs. Temp
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FSDM07652R
Functional Description
1. Startup : In previous generations of Fairchild Power Switches (FPS) the Vcc pin had an external start-up resistor to the DC input voltage line. In this generation the startup resistor is replaced by an internal high voltage current source. At startup, an internal high voltage current source supplies the internal bias and charges the external capacitor (Cvcc) that is connected to the Vcc pin as illustrated in figure 4. When Vcc reaches 12V, the FPS begins switching and the internal high voltage current source is disabled. Then, the FPS continues its normal switching operation and the power is supplied from the auxiliary transformer winding unless Vcc goes below the stop voltage of 8V.
2.1 Pulse-by-pulse current limit: Because current mode control is employed, the peak current through the Sense FET is limited by the inverting input of PWM comparator (Vfb*) as shown in figure 5. Assuming that the 0.9mA current source flows only through the internal resistor (2.5R +R= 2.8 k), the cathode voltage of diode D2 is about 2.5V. Since D1 is blocked when the feedback voltage (Vfb) exceeds 2.5V, the maximum voltage of the cathode of D2 is clamped at this voltage, thus clamping Vfb*. Therefore, the peak value of the current through the Sense FET is limited.
VDC CVcc
2.2 Leading edge blanking (LEB) : At the instant the internal Sense FET is turned on, there usually exists a high current spike through the Sense FET, caused by primary-side capacitance and secondary-side rectifier reverse recovery. Excessive voltage across the Rsense resistor would lead to incorrect feedback operation in the current mode PWM control. To counter this effect, the FPS employs a leading edge blanking (LEB) circuit. This circuit inhibits the PWM comparator for a short time (TLEB) after the Sense FET is turned on.
Vcc 3 6
Vstr
Vcc Idelay Vref IFB
OSC
Istart
Vref 8V/12V Vcc good Internal Bias
Vo Vfb
H11A817A
CB
4 D1 D2 + Vfb* 2.5R
SenseFET
R
Gate driver
KA431
-
Figure 4. Internal startup circuit
VSD
OLP
Rsense
Figure 5. Pulse width modulation (PWM) circuit
2. Feedback Control : FSDM07652R employs current mode control, as shown in figure 5. An opto-coupler (such as the H11A817A) and shunt regulator (such as the KA431) are typically used to implement the feedback network. Comparing the feedback voltage with the voltage across the Rsense resistor plus an offset voltage makes it possible to control the switching duty cycle. When the reference pin voltage of the KA431 exceeds the internal reference voltage of 2.5V, the H11A817A LED current increases, thus pulling down the feedback voltage and reducing the duty cycle. This event typically happens when the input voltage is increased or the output load is decreased.
3. Protection Circuit : The FSDM07652R has several self protective functions such as over load protection (OLP), abnormal over current protection (AOCP), over voltage protection (OVP) and thermal shutdown (TSD). Because these protection circuits are fully integrated into the IC without external components, the reliability can be improved without increasing cost. Once the fault condition occurs, switching is terminated and the Sense FET remains off. This causes Vcc to fall. When Vcc reaches the UVLO stop voltage, 8V, the protection is reset and the internal high voltage current source charges the Vcc capacitor via the Vstr pin. When Vcc reaches the UVLO start voltage,12V, the FPS resumes its normal operation. In this manner, the auto-restart can alternately enable and disable the switching of the power Sense FET until the fault condition is eliminated (see figure 6).
11
FSDM07652R
Vds
Power on
Fault occurs
V FB
Fault removed
6.0V
Over load protection
2.5V
Vcc
T12= Cfb*(6.0-2.5)/Idelay
12V 8V
T1
T2
t
Figure 7. Over load protection
t
Normal operation Fault situation Normal operation
Figure 6. Auto restart operation
AOCP Vaocp
-
Figure 8. AOCP block
3.3 Over voltage Protection (OVP) : If the secondary side feedback circuit were to malfunction or a solder defect caused an open in the feedback path, the current through the opto-coupler transistor becomes almost zero. Then, Vfb climbs up in a similar manner to the over load situation, forcing the preset maximum current to be supplied to the SMPS until the over load protection is activated. Because more energy than required is provided to the output, the output 12
+
3.1 Over Load Protection (OLP) : Overload is defined as the load current exceeding a pre-set level due to an unexpected event. In this situation, the protection circuit should be activated in order to protect the SMPS. However, even when the SMPS is in the normal operation, the over load protection circuit can be activated during the load transition. In order to avoid this undesired operation, the over load protection circuit is designed to be activated after a specified time to determine whether it is a transient situation or an overload situation. Because of the pulse-by-pulse current limit capability, the maximum peak current through the Sense FET is limited, and therefore the maximum input power is restricted with a given input voltage. If the output consumes beyond this maximum power, the output voltage (Vo) decreases below the set voltage. This reduces the current through the opto-coupler LED, which also reduces the opto-coupler transistor current, thus increasing the feedback voltage (Vfb). If Vfb exceeds 2.5V, D1 is blocked and the 3.5uA current source starts to charge CB slowly up to Vcc. In this condition, Vfb continues increasing until it reaches 6V, when the switching operation is terminated as shown in figure 7. The delay time for shutdown is the time required to charge CB from 2.5V to 6.0V with 3.5uA. In general, a 10 ~ 50 ms delay time is typical for most applications.
3.2 Abnormal Over Current Protection (AOCP) : Even though the FPS has OLP (Over Load Protection) and current mode PWM feedback, these are not enough to protect the FPS when a secondary side diode short or a transformer pin short occurs. The FPS has an internal AOCP (Abnormal Over Current Protection) circuit as shown in figure 8. When the gate turn-on signal is applied to the power Sense FET, the AOCP block is enabled and monitors the current through the sensing resistor. The voltage across the resistor is then compared with a preset AOCP level. If the sensing resistor voltage is greater than the AOCP level for longer than 300ns, the reset signal is applied to the latch, resulting in the shutdown of SMPS.
2.5R
OSC
PWM
S
Q
R
Q
Gate driver
R
LEB
Rsense
2 GND
FSDM07652R
voltage may exceed the rated voltage before the over load protection is activated, resulting in the breakdown of the devices in the secondary side. In order to prevent this situation, an over voltage protection (OVP) circuit is employed. In general, Vcc is proportional to the output voltage and the FPS uses Vcc instead of directly monitoring the output voltage. If VCC exceeds 19V, an OVP circuit is activated resulting in the termination of the switching operation. In order to avoid undesired activation of OVP during normal operation, Vcc should be designed to be below 19V.
Vo
Voset
VFB
0.7V 0.5V
Ids
3.4 Thermal Shutdown (TSD) : The Sense FET and the control IC are built in one package. This makes it easy for the control IC to detect the heat generation from the Sense FET. When the temperature exceeds approximately 150C, the thermal shutdown is activated.
Vds
4. Soft Start : The FPS has an internal soft start circuit that increases PWM comparator inverting input voltage together with the Sense FET current slowly after it starts up. The typical soft start time is 10msec, The pulse width to the power switching device is progressively increased to establish the correct working conditions for transformers, inductors, and capacitors. The voltage on the output capacitors is progressively increased with the intention of smoothly establishing the required output voltage. It also helps to prevent transformer saturation and reduce the stress on the secondary diode during startup.
time
T1
Switching disabled
T2 T3
Switching disabled
T4
Figure 9. Waveforms of burst operation
5. Burst operation : In order to minimize power dissipation in standby mode, the FPS enters burst mode operation. As the load decreases, the feedback voltage decreases. As shown in figure 9, the device automatically enters burst mode when the feedback voltage drops below VBURL(500mV). At this point switching stops and the output voltages start to drop at a rate dependent on standby current load. This causes the feedback voltage to rise. Once it passes VBURH(700mV) switching resumes. The feedback voltage then falls and the process repeats. Burst mode operation alternately enables and disables switching of the power Sense FET thereby reducing switching loss in Standby mode.
13
FSDM07652R
Typical application circuit
Application LCD Monitor Output power 40W Input voltage Universal input (85-265Vac) Output voltage (Max current) 5V (2.0A) 12V (2.5A)
Features
* * * * * * High efficiency (>81% at 85Vac input) Low zero load power consumption (<300mW at 240Vac input) Low standby mode power consumption (<800mW at 240Vac input and 0.3W load) Low component count Enhanced system reliability through various protection functions Internal soft-start (10ms)
Key Design Notes
* Resistors R102 and R105 are employed to prevent start-up at low input voltage * The delay time for over load protection is designed to be about 50ms with C106 of 47nF. If a faster triggering of OLP is required, C106 can be reduced to 10nF. 1. Schematic
T1:EER 3016 1 +2 10
D202 MBRF10100
L201
DB101 1 2KBP06M3N257 -
3
+
C103 100uF/400V R102 30K R105 40K
C104 10nF/1kV
R103 56K/2W
C201 1000uF/25V 2 2 D101 UF4007 3 8
+
C202 + 1000uF/25V
12V
C102 220nF/275VAC
4
R104 5
D102 TVR10G
4
7
D201 MBRF1045
L202
6 5 Line Filter: LF101:23mH 4 3
Vstr N.C Vfb Vcc
Drain GND
1 2
C203 1000uF/10V 5 C301 4.7nF R201 1K 6
+
C204 + 1000uF/10V
5V
R101 560K/1W ZD101 22V +
IC101 FSDM07652R
C101 220n/275VAC
C105 22uF/50V
C106 47nF/50V
IC301 H11A817A
R202 R204 1.2k 5.6K R203 1.2k C205 47nF R205 5.6K
RT101
5D-9
250V 2A
F101 FUSE
IC201 KA431
14
FSDM07652R
2. Transformer Schematic Diagram
1 Np 2
10
Nvo1 3 8 7 Nvcc 4 Nvo2
5
6
3.Winding Specification
No Nvcc Np/2 Nvo1 Nvo2 Np/2
Pin (sf) 45 21 10 8 76 32
Wire 0.2 x1
Turns 8 18 7 3 18
Winding Method Center Winding Solenoid Winding Center Winding Center Winding Solenoid Winding
Insulation: Polyester Tape t = 0.050mm, 2Layers 0.4 x 1 0.3 x 3 0.3 x 3 0.4 x 1 Insulation: Polyester Tape t = 0.050mm, 2Layers Insulation: Polyester Tape t = 0.050mm, 2Layers Insulation: Polyester Tape t = 0.050mm, 2Layers Outer Insulation: Polyester Tape t = 0.050mm, 2Layers
4.Electrical Characteristics
Pin Inductance Leakage Inductance 1-3 1-3
Specification 520uH 10% 10uH Max
Remarks 100kHz, 1V 2nd all short
5. Core & Bobbin Core : EER 3016 Bobbin : EER3016 Ae(mm2) : 96
15
FSDM07652R
6.Demo Circuit Part List
Part F101 RT101 R101 R102 R103 R104 R105 R201 R202 R203 R204 R205
Value Fuse 2A/250V NTC 5D-9 Resistor 560K 30K 56K 5 40K 1K 1.2K 1.2K 5.6K 5.6K
Note
Part C301
Value 4.7nF Inductor
Note Polyester Film Cap.
L201 L202 1W 1/4W 2W 1/4W 1/4W 1/4W 1/4W 1/4W 1/4W 1/4W D101 D102 D201 D202 ZD101
5uH 5uH
Wire 1.2mm Wire 1.2mm
Diode UF4007 TVR10G MBRF1045 MBRF10100 Zener Diode Bridge Diode BD101 2KBP06M 3N257 Line Filter LF101 IC101 IC201 IC301 23mH IC FSDM07652R KA431(TL431) H11A817A FPS(7A,650V) Voltage reference Opto-coupler Wire 0.4mm Bridge Diode 22V
Capacitor C101 C102 C103 C104 C105 C106 C201 C202 C203 C204 C205 220nF/275VAC 220nF/275VAC 100uF/400V 10nF/1kV 22uF/50V 47nF/50V 1000uF/25V 1000uF/25V 1000uF/10V 1000uF/10V 47nF/50V Box Capacitor Box Capacitor Electrolytic Capacitor Ceramic Capacitor Electrolytic Capacitor Ceramic Capacitor Electrolytic Capacitor Electrolytic Capacitor Electrolytic Capacitor Electrolytic Capacitor Ceramic Capacitor
16
FSDM07652R
7. Layout
Figure 10. Layout Considerations for FSDM07652R
Figure 11. Layout Considerations for FSDM07652R
17
FSDM07652R
Package Dimensions
TO-220F-6L(Forming)
18
FSDM07652R
Ordering Information
Product Number FSDM07652RYDTU
YDTU : Forming Type
Package TO-220F-6L(Forming)
Marking Code DM07652R
BVdss 650V
Rds(on)Max. 1.6
19
FSDM07652R
DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.
www.fairchildsemi.com 2/9/04 0.0m 001 Stock#DSxxxxxxxx 2004 Fairchild Semiconductor Corporation
2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

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